Introduces a ReRAM performance

Source：Wridy company limited Date：2017-11-16 15:02:29

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To users of the performance index is satisfactory, solid-state drives (SSDs) storage system designers have to develop more complicated architecture and algorithm, is used to deal with 3 d MLC/TLC NAND flash memory limitations inherent in the design.When NAND manufacturers try to reduce costs by reducing design, complex system in the actual user a lot of influence on the performance in the case, which leads to the SSD testing datum in the main system bottlenecks.

NAND flash program operation is very slow, and is done on the large size of the page.The current TLC/MLC NAND or 3 d NAND flash memory needs to be 600 microseconds to 1 millisecond to a programming 8 to 16 k bytes of the page.For a typical user stories, the speed is too slow, so every program operation must first be directed back to a write cache is located in the temporary location, such as a SRAM DRAM cache or a SLC pattern configuration NAND partitions.

NAND flash memory must be erased before programming.NAND erase operation is very slow, takes about 10 ms, and want to be in a big 4-8 million module.In order to overcome this important design limited, can let the SSD controller to manage the logical to physical (L2P) mapping, the original and correct position to track data, and makes the module must be conducted before erasing operation delay this operation is possible.

Release unit recycling represents an additional level of data management, and it was asked for in memory in the idle mode right release module useless data.When the release unit recycling transfer data between modules, new request may create problems.This is a kind of typical punishment, will result in a few seconds long long, uncertain delay.

Therefore, for a SSD writes, usually there will be several times the SSD controller, NAND flash memory operations and DRAM parts between the background.This is called write amplification (WA), it can be used to measure the efficiency of the controller.Most system WA usually between 3-4.Higher WA value will directly affect the reliability and performance of storage equipment, because it is magnified, the number of equipment to make one unit at a much faster cycle.It appears more on the technology of relatively small sizes, on these technical dimensions, NAND memory unit highest cycle dropped to below 3000 program cycle.

These complex problems greatly affect the end user experience, and explained the comparing with the SSD specifications provided by the SSD manufacturer, why the performance of the SSD benchmarks to measure will be different.Under the condition of the click here to write, if users want to download a high-definition movie from the Internet to the local store, or when the enterprise storage use SSD, these problems will not be able to cover up the NAND flash memory technology design of the inherent limitations.

Erased by CrossbarReRAM technology without before operation.Single of ReRAM can write on very small pages particles very quickly completed.To optimize the next generation for ReRAM SSD controller will be able to update faster smaller pages, and greatly reduce the NAND memory operations required for the background.Based on ReRAM SSD will provide lower and more sure read delay (tens of microseconds).

Keywords ReRAM
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Introduces a ReRAM performance